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hbc: internal vref + switch off interrupts after detect
author
Robin Krens
<robin@robinkrens.nl>
Fri, 20 May 2022 13:06:59 +0000
(15:06 +0200)
committer
Robin Krens
<robin@robinkrens.nl>
Fri, 20 May 2022 13:06:59 +0000
(15:06 +0200)
hbc.c
patch
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diff --git
a/hbc.c
b/hbc.c
index
c5c2c0d
..
38332a1
100644
(file)
--- a/
hbc.c
+++ b/
hbc.c
@@
-13,6
+13,7
@@
ISR(SIG_COMPARATOR)
{
if (ACSR & (1 << ACO)) {
PORTB |= (1 << PB4);
{
if (ACSR & (1 << ACO)) {
PORTB |= (1 << PB4);
+ ACSR &= ~(1 << ACIE);
} else {
PORTB &= ~(1 << PB4);
}
} else {
PORTB &= ~(1 << PB4);
}
@@
-22,7
+23,6
@@
EMPTY_INTERRUPT(TIM0_COMPA_vect);
static void switch_idle(void)
{
static void switch_idle(void)
{
- sei();
set_sleep_mode(SLEEP_MODE_IDLE);
sleep_mode();
}
set_sleep_mode(SLEEP_MODE_IDLE);
sleep_mode();
}
@@
-55,7
+55,7
@@
static void config_comparator(void)
//ADMUX |= (1 << MUX0); /* ADC1 as negative input */
ACSR &= ~(1 << ACD); /* enable comparator */
//ADMUX |= (1 << MUX0); /* ADC1 as negative input */
ACSR &= ~(1 << ACD); /* enable comparator */
-
//
ACSR |= (1 << ACBG);
+ ACSR |= (1 << ACBG);
//ACSR |= (1 << ACIS1) | (1 << ACIS0);
DIDR0 |= (1 << AIN1D) | (1 << AIN0D);
//ACSR |= (1 << ACIS1) | (1 << ACIS0);
DIDR0 |= (1 << AIN1D) | (1 << AIN0D);
@@
-74,6
+74,7
@@
int main(void)
//set_ref_voltage();
config_comparator();
sei();
//set_ref_voltage();
config_comparator();
sei();
+ switch_idle();
while(1) {
_delay_ms(100);
while(1) {
_delay_ms(100);