8 * Vector table, each entry contains an interrupt
11 * interrupt vector 1-15: processor exceptions
12 * interrupt vector 16-32: irq0 - irq ..
18 void ivt_set_gate(unsigned char num, void * isr(), short pri) {
20 ivt[num] = (uint32_t) isr;
21 *NVIC_ISER0 = (1 << ((uint32_t)(num) & 0x1F));
29 uart_puts("EXCEPTION X: SYSTEM HALTED\n");
33 /* Initialize interrupt vector */
36 /* clear entiry IVT, in SRAM location for SRAM + .data (in .bss section) */
37 memset(&ivt, 0, (sizeof(uint32_t) * 87));
39 // stack top is loaded from the first entry table on boot/reset
40 // don't need to relocate or init this here
41 extern void * reset, * nmi, * hardfault;
43 ivt_set_gate(1, dummy_isr, 0);
44 ivt_set_gate(2, dummy_isr, 0);
45 ivt_set_gate(3, dummy_isr, 0);
46 ivt_set_gate(4, dummy_isr, 0);
47 ivt_set_gate(5, dummy_isr, 0);
48 ivt_set_gate(6, dummy_isr, 0);
50 /* the vector table starts at 0x0. Since the address 0x0 point to
51 * bootcode, it is on ROM or FLASH. The vector table can be
52 * relocated to other memory locations. We can do this by setting
53 * a register in the NVIC called the vector table offset register */
55 *SCB_VTOR = (volatile uint32_t) &ivt;