2 * Example memory map for the Cortex-A3
3 * Implementations vary among manufacturers. This one is
4 * a STM32F013RC6. Addresses of peripherals vary amongst
5 * manufacturers of boards with similar chips
10 #define BSS_BASE ((volatile uint32_t)(0x20000000));
11 #define MEM_SIZE 512000;
13 /* SYSTEM INFO AND DEBUG */
14 #define MCU_ID ((volatile uint32_t*)( 0xE0042000))
15 #define FLASH_MEM ((volatile uint32_t*)( 0x1FFFF000))
17 /* SYSTEM CONTROL BLOCK REGISTER */
18 #define SCB_VTOR ((volatile uint32_t *)( 0xE000ED08)) // VECTOR TABLE
20 /* NESTED VECTOR INTERRUPT CONTROL REGISTER */
21 #define NVIC_ISER0 ((volatile uint32_t*)( 0xE000E100)) // interrupt set enable register
23 /* SYSTICK REGISTER */
24 #define STK_CTRL ((volatile uint32_t *)(0xE000E010))
25 #define STK_RELOAD ((volatile uint32_t *)(0xE000E014))
28 #define RCC_CR ((volatile uint32_t *)(0x40021000))
29 #define RCC_CFGR ((volatile uint32_t *)(RCC_CR + 0x04))
31 /* SYSTEM CONTROL REGISTER */
32 #define SYSCTRL_RCC ((volatile unsigned long *)(0x40021000))
33 #define RCC_APB2ENR ((volatile unsigned long *)(0x40021018)) // register to enable USART1
35 #define SYSCTRL_RIS ((volatile unsigned long *)(0x400FE050))
36 #define SYSCTRL_RCGC1 ((volatile unsigned long *)(0x400FE104))
37 #define SYSCTRL_RCGC2 ((volatile unsigned long *)(0x400FE108))
38 #define GPIOPA_AFSEL ((volatile unsigned long *)(0x40004420))
40 #define GPIOA_CRH ((volatile unsigned long *)(0x40010804))
41 #define AFIO_EVCR ((volatile unsigned long *)(0x40010000))
44 #define USART1_BASE ((volatile uint32_t) (0x40013800))
45 #define USART1_SR ((volatile uint32_t *) (USART1_BASE))
46 #define USART1_DR ((volatile uint32_t *) (USART1_BASE + 0x04))
47 #define USART1_BRR ((volatile uint32_t *) (USART1_BASE + 0x08))
48 #define USART1_CR1 ((volatile uint32_t *) (USART1_BASE + 0x0C))
49 #define USART1_CR2 ((volatile uint32_t *) (USART1_BASE + 0x10))
50 #define USART1_CR3 ((volatile uint32_t *) (USART1_BASE + 0x14))