1 /* (CC-BY-NC-SA) ROBIN KRENS - ROBIN @ ROBINKRENS.NL
4 * 2019/8/28 - ROBIN KRENS
8 * TIMERS, non-blocking...
17 #include <sys/robsys.h>
19 #include <lib/regfunc.h>
20 #include <lib/string.h>
21 #include <lib/tinyprintf.h>
23 #include <drivers/tsensor.h>
25 #define PRESCALER 0xFFFF // 1 MHz (1 microsecond)
29 enum status { INIT, WAIT_INIT, INIT_DONE } init_status;
30 enum rstatus { READ, READ_INIT, READ_DONE } read_status;
45 static void in_conf() {
46 rwrite(GPIOB_CRL, 0x44444444);
49 static void out_conf() {
50 rwrite(GPIOB_CRL, 0x46444444); // open drain (with pullup resistor)
53 /* set preload and generate update event */
54 static void timer_config(uint16_t preload) {
55 rwrite(TIM4_ARR, preload);
59 /* static void presence_pulse_conf() {
61 current_status = INIT;
63 rclrbit(GPIOB_ODR, 6); // low
64 timer_config(480); // > 480 us
67 static void presence_reply_conf() {
69 current_status = WAIT_INIT;
71 timer_config(100); // > 60 us
74 static void finish_init() {
75 current_status = INIT_FINISH;
79 /* static void terminate() {
80 // current_status = NULL;
82 rclrbit(TIM4_DIER, 0);
87 /* void tsensor_cmd_init() {
88 current_status = WRITE;
91 //rsetbit(TIM4_DIER, 0);
92 //rsetbit(TIM4_CR1, 0); // start
97 rclrbit(GPIOB_ODR, 6); // low
102 /* Handlers for read, write and init pulses */
104 void * write_handler() {
106 rclrbit(TIM4_SR1, 0);
107 rclrbit(TIM4_SR1, 1);
108 if (sensor_cmd.pos < 7) {
110 if ((sensor_cmd.cmd >> sensor_cmd.pos+1) & 0x01) {
112 rwrite(TIM4_CCR1, 150);
113 rsetbit(TIM4_EGR, 0);
118 rwrite(TIM4_CCR1, 600);
119 rsetbit(TIM4_EGR, 0);
131 void * reply_handler() {
133 rclrbit(TIM4_SR1, 0);
134 rclrbit(TIM4_SR1, 1);
135 switch(read_status) {
139 rsetbit(GPIOB_BSRR, 22); // low (<- reset)
140 if (rchkbit(GPIOB_IDR, 6)) {
150 read_status = READ_INIT;
165 rclrbit(TIM4_CR1, 0); // stop
166 rclrbit(TIM4_CCER, 0);
167 rclrbit(TIM4_CCER, 1);
169 //rwrite(GPIOB_CRL, 0x46444444); // floating
171 rsetbit(TIM4_CR1, 2); // only overflow generates update
172 read_status = READ_INIT;
173 timer_config(1); // init 1us
175 ivt_set_gate(46, reply_handler, 0);
176 rsetbit(NVIC_ISER0, 30); // interupt 41 - 32
178 //rclrbit(TIM4_DIER, 0);
180 rclrbit(GPIOB_ODR, 6); // low
181 rsetbit(TIM4_DIER, 0);
183 rsetbit(TIM4_CR1, 0);
190 sensor_cmd.cmd = 0x33;
193 rsetbit(RCC_APB2ENR, 3); // GPIOB enable
194 rsetbit(RCC_APB1ENR, 2); // TIM4 enable
195 rsetbitsfrom(TIM4_CR1, 5, 0x00); // edge-aligned mode
196 rclrbit(TIM4_CR1, 4); // upcounter (clrbit! not needed to set)
197 rsetbit(TIM4_CR1, 2); // only overflow generates update
198 rwrite(TIM4_PSC, PRESCALER - 1);
199 rwrite(GPIOB_CRL, 0x4A444444);
204 if ((sensor_cmd.cmd >> sensor_cmd.pos) & 0x01) {
206 rwrite(TIM4_CCR1, 150);
210 rwrite(TIM4_CCR1, 600);
213 rsetbitsfrom(TIM4_CCMR1, 4, 0x6); // forced high on match
215 rsetbit(TIM4_CCER, 0);
216 rsetbit(TIM4_CCER, 1);
219 ivt_set_gate(46, write_handler, 0);
220 rsetbit(NVIC_ISER0, 30); // interupt 41 - 32
222 //rsetbit(TIM4_DIER, 1);
223 rsetbit(TIM4_DIER, 0);
224 rsetbit(TIM4_CR1, 0);
229 /* void * init_handler() {
231 switch(current_status) {
233 printf("M: reset\n");
234 presence_reply_conf();
237 if (!rchkbit(GPIOB_IDR, 6)) {
252 printf("M: write\n");
253 if (sensor_cmd.pos > 7)
256 if ((sensor_cmd.cmd >> sensor_cmd.pos) & 0x01) {
268 printf("no status\n");
271 rclrbit(TIM4_SR1, 0);
281 * read, similar as pulse response */
284 void * bare_handler() {
287 //w2 printf("CHECKING STATUS\n");
289 //w2 if(rchkbit(GPIOB_IDR, 6)) {
290 //w2 printf("port high\n");
293 //w2 printf("port low\n");
298 printf("Count event %d\n", cnt);
299 int switchled = cnt % 2;
301 rwrite(GPIOB_CRL, 0x46444444); // open drain general for sensor?
302 printf("setting low\n");
303 rclrbit(GPIOB_ODR, 6); // low
306 printf("pulling high \n");
307 rwrite(GPIOB_CRL, 0x44444444); // open drain general for sensor?
308 //rsetbit(GPIOB_ODR, 6); // high
311 rclrbit(TIM4_SR1, 0);
315 /* void tsensor_init() {
317 sensor_cmd.cmd = 0x33;
320 rsetbit(RCC_APB2ENR, 3); // GPIOB enable
321 rsetbit(RCC_APB1ENR, 2); // TIM4 enable
323 rsetbitsfrom(TIM4_CR1, 5, 0x00); // edge-aligned mode
324 rclrbit(TIM4_CR1, 4); // upcounter (clrbit! not needed to set)
325 rsetbit(TIM4_CR1, 2); // only overflow generates update
327 rwrite(TIM4_PSC, PRESCALER - 1);
328 presence_pulse_conf();
329 // rwrite(TIM4_ARR, preload);
330 // rsetbit(TIM4_EGR, 0);
332 ivt_set_gate(46, init_handler, 0);
333 rsetbit(NVIC_ISER0, 30); // interupt 41 - 32
335 //w rsetbit(GPIOB_ODR, 6); //
336 rsetbit(TIM4_DIER, 0);
337 rsetbit(TIM4_CR1, 0); // start
345 //w2 rsetbit(RCC_APB2ENR, 3);
346 //w2 rwrite(GPIOB_CRL, 0x48444444); // input with pull up down
347 //w2 tsensor_simple(5000);
350 //rsetbit(RCC_APB2ENR, 3); // GPIOB enable
351 //rwrite(GPIOB_CRL, 0x46444444); // open drain general for sensor?
353 //rsetbit(GPIOB_BSRR, 22); // low (<- reset)
358 // tsensor_output(580, 520);
360 // tsensor_simple(580);
363 //void tsensor_output(uint16_t preload, uint16_t compare/*, uint16_t pulses */) {
364 // /* GPIO AND CLOCK */
365 // rsetbit(RCC_APB2ENR, 3); // GPIOB enable
366 // rwrite(GPIOB_CRL, 0x4A444444); // PB6 for Channel 1 TIM4 alternate
367 // rsetbit(RCC_APB1ENR, 2); // TIM4 enable
369 // rsetbitsfrom(TIM4_CR1, 5, 0x00); // edge-aligned mode
370 // rclrbit(TIM4_CR1, 4); // upcounter (clrbit! not needed to set)
371 // rsetbit(TIM4_CR1, 2); // only overflow generates update
373 // rwrite(TIM4_PSC, PRESCALER - 1); // 1 MHz
374 // rwrite(TIM4_ARR, preload); // preload
375 // rwrite(TIM4_CCR1, compare); // compare
376 // //rwrite(TIM4_RCR, pulses - 1); /* repeat ONLY IN ADVANCED TIMER */
378 // rsetbit(TIM4_EGR, 0); // update generation
380 // rsetbit(TIM4_CR1, 3); // one pulse mode
381 // rsetbitsfrom(TIM4_CCMR1, 4, 0x6); // mode
383 // //rsetbit(TIM4_CCMR1, 3); // preload enable
384 // //rsetbit(TIM4_CR1, 7); // buffered
386 // rsetbit(TIM4_CCER, 0); // enable output channeli 1
387 // rsetbit(TIM4_CCER, 1); // active low
388 // rsetbit(TIM4_CR1, 0); // start counter
391 // ivt_set_gate(46, tmp_update_handler, 0);
393 // rsetbit(TIM4_DIER, 1);
394 // rsetbit(NVIC_ISER0, 30); // interupt 41 - 32