robinkrens.nl - git repository - cortex-from-scratch/blob - drivers/tsensor.c

   1 /* (CC-BY-NC-SA) ROBIN KRENS - ROBIN @ ROBINKRENS.NL
   2  *
   3  * $LOG$
   4  * 2019/8/4 - ROBIN KRENS
   5  * Initial version
   6  *
   7  * $DESCRIPTION$
   8  * Temperature sensor
   9  *
  10  * */
  11
  12 #include <stdbool.h>
  13 #include <stddef.h>
  14 #include <stdint.h>
  15
  16 #include <sys/mmap.h>
  17 #include <sys/robsys.h>
  18
  19 #include <lib/regfunc.h>
  20 #include <lib/string.h>
  21 #include <lib/tinyprintf.h>
  22
  23 #include <drivers/tsensor.h>
  24
  25 #define PRESCALER 36000 // 1 Mhz
  26
  27 int *ccr1, *ccr2, *ccr1b, *ccr2b;
  28 bool s1, s2;
  29
  30  void * update_handler() {
  31
  32         s1 = false;
  33         s2 = false;
  34         ccr1 = 0xFFFFFFFF;
  35         ccr2 = 0xFFFFFFFF;
  36         ccr1b = 0xFFFFFFFF;
  37         ccr2b = 0xFFFFFFFF;
  38
  39         if(rchkbit(TIM4_SR1, 1)) {
  40                         s1 = true;
  41                 //      printf("CCR1: %p\n", *TIM4_CCR1);
  42                 //      printf("CCR2: %p\n", *TIM4_CCR2);
  43                         ccr1 = *TIM4_CCR1;
  44                         ccr2 = *TIM4_CCR2;
  45                         rclrbit(TIM4_SR1, 1);
  46         }
  47
  48         if(rchkbit(TIM4_SR1, 2)) {
  49                         s2 = true;
  50                         ccr1b = *TIM4_CCR1;
  51                         ccr2b = *TIM4_CCR2;
  52                         rclrbit(TIM4_SR1, 2);
  53         }
  54
  55         if(rchkbit(TIM4_SR1, 6)) {
  56         //              printf("TRIGGER\n");
  57                         rclrbit(TIM4_SR1, 6);
  58         }
  59
  60         rclrbit(TIM4_SR1, 0);
  61 //      rclrbit(TIM4_SR1, 9); // OF
  62 //      rclrbit(TIM4_SR1, 10); // OF
  63
  64         // TODO clear overflow tag
  65
  66         printf("SR1/CCR1: %p\n", ccr1);
  67         printf("SR1/CCR2: %p\n", ccr2);
  68         printf("SR2/CCR1: %p\n", ccr1b);
  69         printf("SR2/CCR2: %p\n", ccr2b);
  70
  71         if (s1)
  72                 printf("EDGE DOWN\n");
  73         if (s2)
  74                 printf("EDGE UP\n");
  75
  76         s1 = false;
  77         s2 = false;
  78 }
  79
  80 static void reset() {
  81         rwrite(GPIOB_CRL, 0x44444444);
  82 }
  83
  84 void * tmp_update_handler() {
  85
  86         printf("SR: %p\n", *TIM4_SR1);
  87
  88         rclrbit(TIM4_CR1, 0);   /* EMULATOR STOP */
  89         rclrbit(TIM4_SR1, 0);
  90         rclrbit(TIM4_SR1, 1);
  91                 reset();
  92                 tsensor_input(0xFFFF);
  93
  94 //      if(rchkbit(TIM4_SR1, 1)) {
  95 //              printf("TEST\n");
  96 //      }
  97
  98 }
  99
 100 void * cnt_complete_handler() {
 101         rclrbit(TIM4_CR1, 0);
 102         rclrbit(TIM4_SR1, 0);
 103         rclrbit(TIM4_DIER, 0);
 104         rwrite(GPIOB_CRL, 0x44444444);
 105         printf("CNT COMPLETE\n");
 106         tsensor_input(0xFFFF);
 107 }
 108
 109
 110 void tsensor_simple(uint16_t preload) {
 111
 112         rsetbit(RCC_APB1ENR, 2); // TIM4 enable
 113
 114         rsetbitsfrom(TIM4_CR1, 5, 0x00); // edge-aligned mode
 115         rclrbit(TIM4_CR1, 4); // upcounter (clrbit! not needed to set)
 116         rsetbit(TIM4_CR1, 2); // only overflow generates update
 117
 118         rwrite(TIM4_PSC, PRESCALER - 1);
 119         rwrite(TIM4_ARR, preload);
 120         rsetbit(TIM4_EGR, 0);
 121
 122         ivt_set_gate(46, cnt_complete_handler, 0);
 123         rsetbit(NVIC_ISER0, 30); // interupt 41 - 32
 124
 125         rsetbit(GPIOB_BSRR, 22); //
 126         rsetbit(TIM4_DIER, 0);
 127         rsetbit(TIM4_CR1, 0);
 128
 129 }
 130
 131 void run() {
 132
 133         rsetbit(RCC_APB2ENR, 3); // GPIOB enable
 134         rwrite(GPIOB_CRL, 0x47444444); // open drain general
 135
 136         rsetbit(GPIOB_BSRR, 22); // high
 137         tsensor_simple(2000);
 138 //      tsensor_output(580, 520);
 139 //      reset();
 140 //      tsensor_simple(580);
 141 }
 142
 143 void tsensor_output(uint16_t preload, uint16_t compare/*, uint16_t pulses */) {
 144
 145         /* GPIO AND CLOCK */
 146         rsetbit(RCC_APB2ENR, 3); // GPIOB enable
 147         rwrite(GPIOB_CRL, 0x4A444444); // PB6 for Channel 1 TIM4 alternate
 148         rsetbit(RCC_APB1ENR, 2); // TIM4 enable
 149
 150         rsetbitsfrom(TIM4_CR1, 5, 0x00); // edge-aligned mode
 151         rclrbit(TIM4_CR1, 4); // upcounter (clrbit! not needed to set)
 152         rsetbit(TIM4_CR1, 2); // only overflow generates update
 153
 154         rwrite(TIM4_PSC, PRESCALER - 1); // 1 MHz
 155         rwrite(TIM4_ARR, preload); // preload
 156         rwrite(TIM4_CCR1, compare); // compare
 157         //rwrite(TIM4_RCR, pulses - 1); /* repeat ONLY IN ADVANCED TIMER */
 158
 159         rsetbit(TIM4_EGR, 0); // update generation
 160
 161         rsetbit(TIM4_CR1, 3); // one pulse mode
 162         rsetbitsfrom(TIM4_CCMR1, 4, 0x6); // mode
 163
 164         //rsetbit(TIM4_CCMR1, 3); // preload enable
 165         //rsetbit(TIM4_CR1, 7); // buffered
 166
 167         rsetbit(TIM4_CCER, 0); // enable output channeli 1
 168         rsetbit(TIM4_CCER, 1); // active low
 169         rsetbit(TIM4_CR1, 0); // start counter
 170
 171         /* INTERRUPTS */
 172         ivt_set_gate(46, tmp_update_handler, 0);
 173
 174         rsetbit(TIM4_DIER, 1);
 175         rsetbit(NVIC_ISER0, 30); // interupt 41 - 32
 176
 177 }
 178
 179 void tsensor_input(uint16_t preload) {
 180
 181         //uint16_t timestamp;
 182         /* GPIO AND CLOCK */
 183         //rsetbit(RCC_APB2ENR, 3); // GPIOB enable
 184         //rwrite(GPIOB_CRL, 0x44444444); // Input floating (default state)
 185         //rsetbit(RCC_APB1ENR, 2); // TIM4 enable
 186
 187         //rsetbitsfrom(TIM4_CR1, 5, 0x00); // edge-aligned mode
 188         //rclrbit(TIM4_CR1, 4); // upcounter (clrbit! not needed to set)
 189
 190         rwrite(TIM4_PSC, PRESCALER - 1); // 1 MHz
 191         rwrite(TIM4_ARR, preload); // preload
 192
 193
 194         rsetbit(TIM4_EGR, 0); // update generation
 195
 196         rsetbit(TIM4_CCMR1, 0); // input on TI1
 197         rsetbit(TIM4_CCMR1, 9); // another input TI2
 198         rsetbit(TIM4_CCER, 1); // other polarity for T1, inverted
 199
 200         /* TODO: reg funct */
 201         rsetbit(TIM4_SMCR, 4); // OLD: 101, new Edge detector
 202         rsetbit(TIM4_SMCR, 6); //
 203
 204
 205         // rsetbit(TIM4_SMCR, 2); // RESET rising edge triggers counter and generates update
 206         rsetbit(TIM4_SMCR, 2); // OLD: 110
 207         rsetbit(TIM4_SMCR, 1);
 208         rsetbit(TIM4_SMCR, 0);
 209         //rsetbit(TIM4_SMCR, 1); // 110
 210
 211         //rsetbit(TIM4_CR1, 3); // one pulse mode // NOTE: RESET after finised preload
 212         // will catch multiple signal... can set fram
 213
 214         rsetbit(TIM4_CCER, 0); // enable capture channel 1 (changed pos)
 215         rsetbit(TIM4_CCER, 4); // enable capture channel 2
 216         /* Caught on rising edge, no need to change*/
 217         /* Clear capture event flag */
 218 //      rsetbit(TIM4_CR1, 0); // RESET with no trigger mode start
 219
 220         // enable capture channel 1 interrupt
 221         rsetbit(TIM4_DIER, 1);
 222         rsetbit(TIM4_DIER, 2);
 223         ivt_set_gate(46, update_handler, 0);
 224         rsetbit(NVIC_ISER0, 30);
 225
 226 }