1 /* (CC-BY-NC-SA) ROBIN KRENS - ROBIN @ ROBINKRENS.NL
4 * 2019/9/14 - ROBIN KRENS
19 #include <sys/robsys.h>
21 #include <lib/regfunc.h>
22 #include <lib/string.h>
23 #include <lib/tinyprintf.h>
25 #include <drivers/st7735s.h>
30 int tft_command(uint8_t cmd, int argsc, ...);
33 /* Peripherial init */
34 rsetbit(RCC_APB1ENR, 14); // enable SPI2
35 rsetbit(RCC_APB2ENR, 3); // enable GPIOB
36 rsetbit(RCC_APB2ENR, 4); // enable GPIOC
38 /* The PINS used are PB12, PB13, PB15 and PC6 respectively
39 * NSS (or CS): alternative function pusp-pull
40 * NSS Output is (always high) enabled with this setting
41 * SCK Master: alternate function push-pull
42 * MOSI (or DI): alternate function push-pull
43 * D/CX (or A0): Command or data write line PC6 */
44 rwrite(GPIOB_CRH, 0xA4AA4444);
45 rwrite(GPIOC_CRL, 0x42444444);
47 /* Chip select: software enabled
48 * In case for a hardware setup, connect NSS (CS) to
53 rsetbit(SPI2_CR1, 15); // one-wire mode
54 rsetbit(SPI2_CR1, 14); // start with transfer
55 rsetbit(SPI2_CR1, 4); // FPLCK div 8
56 rsetbit(SPI2_CR1, 2); // master selection
57 rsetbit(SPI2_CR1, 6); // enable SPI
60 tft_command(TFT_SWRESET, 0);
65 /* Frame rate control */
66 tft_command(TFT_FRMCTR1, 3, 0x01, 0x2C, 0x2D);
67 tft_command(TFT_FRMCTR2, 3, 0x01, 0x2C, 0x2D);
68 tft_command(TFT_FRMCTR3, 6, 0x01, 0x2C, 0x2D, 0x01, 0x2C, 0x2D);
71 tft_command(TFT_PWCTR1, 3, 0xA2, 0x02, 0x84);
72 tft_command(TFT_PWCTR2, 1, 0xC5);
73 tft_command(TFT_PWCTR3, 2, 0x0A, 0x00);
74 tft_command(TFT_PWCTR4, 2, 0x8A, 0x2A);
75 tft_command(TFT_PWCTR5, 2, 0x8A, 0xEE);
76 tft_command(TFT_VMCTR1, 1, 0x0E);
79 tft_command(TFT_INVOFF, 0);
80 tft_command(TFT_COLMOD, 1, 0x05); // 0x05
81 tft_command(TFT_MADCTL, 1, 0xC0); // TODO: check
83 tft_command(TFT_CASET, 4, 0x00, 0x00, 0x00, 0x7F);
84 tft_command(TFT_RASET, 4, 0x00, 0x00, 0x00, 0x9F);
87 tft_command(TFT_GMCTRP1, 16, 0x02, 0x1C, 0x07, 0x12,
88 0x37, 0x32, 0x29, 0x2D,
89 0x29, 0x25, 0x2B, 0x39,
90 0x00, 0x01, 0x03, 0x10);
91 tft_command(TFT_GMCTRN1, 16, 0x03, 0x1D, 0x07, 0x06,
92 0x2E, 0x2C, 0x29, 0x2D,
93 0x2E, 0x2E, 0x37, 0x3F,
94 0x00, 0x00, 0x02, 0x10);
97 tft_command(TFT_NORON, 0);
99 tft_command(TFT_DISPON, 0);
103 //tft_command(.., 3, 0xFC, 0xFC, 0xFC);
105 for (int i = 0; i < 100; i ++) {
106 tft_command(TFT_CASET, 4, 0x00, i, 0x00, i+1);
107 tft_command(TFT_RASET, 4, 0x00, i, 0x00, i+1);
108 tft_command(TFT_RAMWR, 2, 0xFF, 0xFF);
111 /* tft_command(TFT_RAMWR, 100,
112 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
113 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
114 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
115 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
116 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
117 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
118 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
119 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
120 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
121 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0
126 tft_command(TFT_CASET, 4, 0x00, 0x08, 0x00, 0x09);
127 tft_command(TFT_RASET, 4, 0x00, 0x08, 0x00, 0x09);
128 tft_command(TFT_RAMRD, 0);
130 //tft_command(0x0C, 0);
131 //tft_command(0x0A, 0);
133 rclrbit(SPI2_CR1, 14); // receive
135 while(!rchkbit(SPI2_SR, 0));
136 uint8_t chip_id = *SPI2_DR;
137 printf("COLMOD: %#x\n", chip_id);
139 rclrbit(SPI2_CR1, 8); // deselect
142 /* Helper function */
143 static int txbuf_empty () {
145 while(!rchkbit(SPI2_SR, 1)) {
148 printf("Error: transmit timeout!\n");
158 int tft_command(uint8_t cmd, int argsc, ...) {
163 rclrbit(GPIOC_ODR, 6);
164 rwrite(SPI2_DR, cmd);
173 rsetbit(GPIOC_ODR, 6);
174 for (int i = 0; i < argsc; i++) {
175 uint8_t p = (uint8_t) va_arg(ap, unsigned int);
179 //printf("%c", (uint8_t) va_arg(ap, unsigned int));
189 /* write command: CS stay low
195 // DC is data/command pin set and reset
197 /* uint8_t cmd = 0x11;
198 rwrite(SPI2_DR, cmd);
199 while (!rchkbit(SPI2_SR, 1));
201 for (int i = 0; i < 10; i++)
208 rwrite(SPI2_DR, cmd);
209 while (!rchkbit(SPI2_SR, 1)); // check line busy?
213 rsetbit(GPIOC_ODR, 6);
215 while (!rchkbit(SPI2_SR, 1)); //
218 rclrbit(GPIOC_ODR, 6);
219 rwrite(SPI2_DR, cmd);
220 while (!rchkbit(SPI2_SR, 1)); //
222 rclrbit(SPI2_CR1, 14); // receive
224 while(!rchkbit(SPI2_SR, 0));
225 uint8_t chip_id = *SPI2_DR;
226 printf("Chip id: %#x\n", chip_id);