1 /* (CC-BY-NC-SA) ROBIN KRENS - ROBIN @ ROBINKRENS.NL
4 * 2019/7/25 - ROBIN KRENS
16 #include <sys/robsys.h>
18 #include <lib/regfunc.h>
19 #include <lib/string.h>
20 #include <lib/stdio.h>
21 #include <lib/tinyprintf.h>
23 #include <drivers/at24c.h>
28 #define WRITE_CMD 0xA0
29 #define PAGE 64 /* Bytes that can be written continiously */
30 #define BUFFER 256 /* */
32 /* STM32F1 microcontrollers do not provide the ability to pull-up SDA and SCL lines. Their
33 GPIOs must be configured as open-drain. So, you have to add two additional resistors to
34 pull-up I2C lines. Something between 4K and 10K is a proven value.
39 void * cap_handler() {
46 /* Program the peripheral input clock in I2C_CR2 Register
47 * in order to generate correct timings. Configure the clock control registers CCR
48 Configure the rise time register TRIS Program the I2C_CR1 register to enable the peripheral Enable GPIOB6 and B7*/
50 rsetbit(RCC_APB1ENR, 21);
51 rsetbit(RCC_APB2ENR, 3);
52 rwrite(GPIOB_CRL, 0xEE444444);
53 rsetbitsfrom(I2C_CR2, 0, 0x2); // 2 MHz
54 rwrite(I2C_TRISE, 0x3); // MAX = 1000ns, TPCLK1 = 500ns (+1)
55 rwrite(I2C_CCR, 0x000A); // standard modeļ¼ output 100 kHz (100hz* / perip)
56 rsetbit(I2C_CR1, 10); // send ack if Master receives data
57 rsetbit(I2C_CR2, 10); // buffer interrupt
58 rsetbit(I2C_CR1, 0); // enable
63 static void start_condition() {
64 rsetbit(I2C_CR1, 8); //start
67 static void stop_condition() {
68 rsetbit(I2C_CR1, 9); //stop
71 static int ack_recv() {
73 while(!(*I2C_SR1 & 0x2)) {
83 static int buf_empty() {
85 while(!(*I2C_SR1 & 0x80)) {
93 // TODO: interrupt base, so it doesn't block
94 static void data_recv() {
95 while(!(*I2C_SR1 & 0x40)) {
103 for (int i = 0; i < 0xFFFF; i++)
107 int eeprom_write(uint16_t addr, char * data, size_t size) {
110 printf("Maximum writable page size: %d\n", PAGE);
114 uint8_t hi_lo[] = { (uint8_t)(addr >> 8), (uint8_t)addr };
117 rwrite(I2C_DR, WRITE_CMD);
119 printf("Can't reach device");
123 rwrite(I2C_DR, hi_lo[0]); // higher part of address
125 printf("Can't address location");
128 rwrite(I2C_DR,hi_lo[1]); // lower part of address
130 printf("Can't address location");
134 for (int i = 0; i < size; i++) {
135 rwrite(I2C_DR, *data++);
137 printf("Write error");
146 /* Random access read based on dummy write */
147 int eeprom_read(uint16_t addr, int num) {
150 uint8_t hi_lo[] = { (uint8_t)(addr >> 8), (uint8_t)addr };
154 rwrite(I2C_DR, WRITE_CMD);
156 printf("Can't reach device");
160 rwrite(I2C_DR, hi_lo[0]); // higher part of address
162 printf("Can't address location");
165 rwrite(I2C_DR,hi_lo[1]); // lower part of address
167 printf("Can't address location");
175 start_condition(); // restart condition
176 rwrite(I2C_DR, READ_CMD); // read? to address CMD
178 printf("Can't initiate read");
183 rsetbit(I2C_CR1, 10); // send ack if Master receives data
186 // printf("%d:%p\n", addr, c);
187 for (int i = 0; i < BUFFER ; i++ ) {
189 buf[i] = (char) *I2C_DR;
192 printf("%p, %p, %p, %p\n", *I2C_SR1, *I2C_SR2, *I2C_DR, *I2C_CR1);
193 printf("DATA: %s\n", buf);
199 // char * global_data = "abcdefghijklmnop";
201 // eeprom_write(0x0080, global_data, strlen(global_data));
205 // for (int i = 0; i < 0xFFFF; i++) {
214 //W uint32_t statusr;
216 //W start_condition();
217 //W rwrite(I2C_DR, WRITE_CMD); // write to address CMD
219 //W cputs("CAN'T REACH DEVICE");
221 //W rwrite(I2C_DR, 0x00);
224 //W rwrite(I2C_DR, 0x03);
227 //W //rwrite(I2C_DR, 0x61);
228 //W //if(!buf_empty())
229 //W // cputs("FAIL");
231 //W //statusr = *I2C_SR1;
232 //W //statusr = *I2C_SR2;
233 //W stop_condition();
235 // start_condition();
236 // rwrite(I2C_DR, 0xA0); // dummy write
238 // cputs("CAN'T REACH DEVICE");
240 // rwrite(I2C_DR, 0x00);
243 // rwrite(I2C_DR, 0x00);
249 //W start_condition(); // restart condition
250 //W rwrite(I2C_DR, 0xA1); // read? to address CMD
252 //W cputs("COULDN'T START READ CMD");
256 //W //cputs("NO RESPONSE");
258 //W char a = (char) *I2C_DR;
259 //W printf("DATA %c\n", a);
261 //W stop_condition();
265 //statusr = *I2C_SR1; // clear start_signal
266 //regw_u32(I2C_DR, 0xC1, 0, OWRITE);
268 // cputs("TIMEOUT2!");
269 //statusr = *I2C_SR1;
270 //statusr = *I2C_SR2;
271 //regw_u32(I2C_DR, 0x7D, 0, OWRITE);
273 // cputs("TIMEOUT3!");
280 regw_u32(I2C_DR, DISPLAY_ON, 0, OWRITE);
286 /* regw_u32(I2C_CR1, 0x1, 8, SETBIT); //start
287 uint32_t read_status = *I2C_SR1;
288 regw_u32(I2C_DR, 0x40, 0, OWRITE); // write to address CMD
289 read_status = *I2C_SR1;
290 read_status = *I2C_SR2;
291 regw_u32(I2C_CR1, 0x1, 9, SETBIT); //stop
292 read_status = *I2C_SR1;
294 regw_u32(I2C_CR1, 0x1, 8, SETBIT); //start
295 read_status = *I2C_SR1;
296 regw_u32(I2C_DR, 0xC1, 0, OWRITE); // segment address
297 read_status = *I2C_SR1;
298 read_status = *I2C_SR2;
299 regw_u32(I2C_DR, 0x7D, 0, OWRITE); // write a six
301 regw_u32(I2C_CR1, 0x1, 9, SETBIT); //stop
302 read_status = *I2C_SR1;
304 regw_u32(I2C_CR1, 0x1, 8, SETBIT); //start
305 read_status = *I2C_SR1;
307 regw_u32(I2C_DR, DISPLAY_ON, 0, OWRITE);
308 read_status = *I2C_SR1;
309 regw_u32(I2C_CR1, 0x1, 9, SETBIT); //stop */