1 /* (CC-BY-NC-SA) ROBIN KRENS - ROBIN @ ROBINKRENS.NL
4 * 2019/7/25 - ROBIN KRENS
16 #include <sys/robsys.h>
18 #include <lib/regfunc.h>
19 #include <lib/string.h>
20 #include <lib/stdio.h>
21 #include <lib/tinyprintf.h>
23 #include <drivers/at24c.h>
28 #define WRITE_CMD 0xA0
29 #define PAGE 64 /* Bytes that can be written continiously */
30 #define BUFFER 4 /* */
32 /* STM32F1 microcontrollers do not provide the ability to pull-up SDA and SCL lines. Their
33 GPIOs must be configured as open-drain. So, you have to add two additional resistors to
34 pull-up I2C lines. Something between 4K and 10K is a proven value.
37 static char eeprombuf[BUFFER];
39 void * cap_handler() {
46 /* Program the peripheral input clock in I2C_CR2 Register
47 * in order to generate correct timings. Configure the clock control registers CCR
48 Configure the rise time register TRIS Program the I2C_CR1 register to enable the peripheral Enable GPIOB6 and B7*/
50 rsetbit(RCC_APB1ENR, 21);
51 rsetbit(RCC_APB2ENR, 3);
52 rwrite(GPIOB_CRL, 0xEE444444);
53 rsetbitsfrom(I2C_CR2, 0, 0x2); // 2 MHz
54 rwrite(I2C_TRISE, 0x3); // MAX = 1000ns, TPCLK1 = 500ns (+1)
55 rwrite(I2C_CCR, 0x000A); // standard modeļ¼ output 100 kHz (100hz* / perip)
56 rsetbit(I2C_CR1, 10); // send ack if Master receives data
57 rsetbit(I2C_CR2, 10); // buffer interrupt
58 rsetbit(I2C_CR1, 0); // enable
63 static void start_condition() {
64 rsetbit(I2C_CR1, 8); //start
67 static void stop_condition() {
68 rsetbit(I2C_CR1, 9); //stop
71 static int ack_recv() {
73 while(!(*I2C_SR1 & 0x2)) {
83 static int buf_empty() {
85 while(!(*I2C_SR1 & 0x80)) {
93 // TODO: interrupt base, so it doesn't block
94 static void data_recv() {
95 while(!(*I2C_SR1 & 0x40)) {
99 static void late_recv() {
100 while(!(*I2C_SR1 & 0x4)) {
108 for (int i = 0; i < 0xFFFF; i++)
112 int eeprom_write(uint16_t addr, char * data, size_t size) {
115 printf("Maximum writable page size: %d\n", PAGE);
119 uint8_t hi_lo[] = { (uint8_t)(addr >> 8), (uint8_t)addr };
122 rwrite(I2C_DR, WRITE_CMD);
124 printf("Can't reach device");
128 rwrite(I2C_DR, hi_lo[0]); // higher part of address
130 printf("Can't address location");
133 rwrite(I2C_DR,hi_lo[1]); // lower part of address
135 printf("Can't address location");
139 for (int i = 0; i < size; i++) {
140 rwrite(I2C_DR, *data++);
142 printf("Write error");
151 /* Random access read based on dummy write */
152 int eeprom_read(uint16_t addr, int num) {
155 uint8_t hi_lo[] = { (uint8_t)(addr >> 8), (uint8_t)addr };
157 /* Dummy write to set address */
159 rwrite(I2C_DR, WRITE_CMD);
161 printf("Can't reach device");
165 rwrite(I2C_DR, hi_lo[0]); // higher part of address
167 printf("Can't address location");
170 rwrite(I2C_DR,hi_lo[1]); // lower part of address
172 printf("Can't address location");
181 start_condition(); // restart condition
182 rwrite(I2C_DR, READ_CMD); // read? to address CMD
184 printf("Can't initiate read");
189 char c = (char) *I2C_DR;
190 printf("DATA: %c\n", c);
194 rsetbit(I2C_CR1, 10); // set ACK
195 rsetbit(I2C_CR1, 11); // set POS
196 start_condition(); // restart condition
197 rwrite(I2C_DR, READ_CMD); // read to address CMD
199 printf("Can't initiate read");
202 rclrbit(I2C_CR1, 10); // clear ACK
205 char c = (char) *I2C_DR;
206 char c2 = (char) *I2C_DR;
207 printf("DATA: %c,%c\n", c, c2);
211 rsetbit(I2C_CR1, 10); // set ACK
212 start_condition(); // restart condition
213 rwrite(I2C_DR, READ_CMD); // read to address CMD
215 printf("Can't initiate read");
218 for(int i = 0; i < num-3; i++) {
220 eeprombuf[i] = (char) *I2C_DR;
223 rclrbit(I2C_CR1, 10);
224 eeprombuf[num-3] = *I2C_DR;
226 eeprombuf[num-2] = *I2C_DR;
228 eeprombuf[num-1] = *I2C_DR;
229 eeprombuf[num] = '\0';
230 printf("DATA: %s\n", eeprombuf);
235 //W rsetbit(I2C_CR1, 10); // send ack if Master receives data
237 //W// char c = *I2C_DR;
238 //W// printf("%d:%p\n", addr, c);
239 //W for (int i = 0; i < BUFFER ; i++ ) {
241 //W buf[i] = (char) *I2C_DR;
244 //W printf("%p, %p, %p, %p\n", *I2C_SR1, *I2C_SR2, *I2C_DR, *I2C_CR1);
245 // printf("DATA: %s\n", buf);
251 // char * gd = "abcd";
252 // eeprom_write(0x0000, gd, strlen(gd));
255 // char * global_data = "abcdefghijklmnop";
257 // eeprom_write(0x0080, global_data, strlen(global_data));
261 // for (int i = 0; i < 0xFFFF; i++) {
269 // eeprom_read(0x0000, 1);
271 // eeprom_read(0x0000, 2);
273 eeprom_read(0x0000, 4);
276 //W uint32_t statusr;
278 //W start_condition();
279 //W rwrite(I2C_DR, WRITE_CMD); // write to address CMD
281 //W cputs("CAN'T REACH DEVICE");
283 //W rwrite(I2C_DR, 0x00);
286 //W rwrite(I2C_DR, 0x03);
289 //W //rwrite(I2C_DR, 0x61);
290 //W //if(!buf_empty())
291 //W // cputs("FAIL");
293 //W //statusr = *I2C_SR1;
294 //W //statusr = *I2C_SR2;
295 //W stop_condition();
297 // start_condition();
298 // rwrite(I2C_DR, 0xA0); // dummy write
300 // cputs("CAN'T REACH DEVICE");
302 // rwrite(I2C_DR, 0x00);
305 // rwrite(I2C_DR, 0x00);
311 //W start_condition(); // restart condition
312 //W rwrite(I2C_DR, 0xA1); // read? to address CMD
314 //W cputs("COULDN'T START READ CMD");
318 //W //cputs("NO RESPONSE");
320 //W char a = (char) *I2C_DR;
321 //W printf("DATA %c\n", a);
323 //W stop_condition();
327 //statusr = *I2C_SR1; // clear start_signal
328 //regw_u32(I2C_DR, 0xC1, 0, OWRITE);
330 // cputs("TIMEOUT2!");
331 //statusr = *I2C_SR1;
332 //statusr = *I2C_SR2;
333 //regw_u32(I2C_DR, 0x7D, 0, OWRITE);
335 // cputs("TIMEOUT3!");
342 regw_u32(I2C_DR, DISPLAY_ON, 0, OWRITE);
348 /* regw_u32(I2C_CR1, 0x1, 8, SETBIT); //start
349 uint32_t read_status = *I2C_SR1;
350 regw_u32(I2C_DR, 0x40, 0, OWRITE); // write to address CMD
351 read_status = *I2C_SR1;
352 read_status = *I2C_SR2;
353 regw_u32(I2C_CR1, 0x1, 9, SETBIT); //stop
354 read_status = *I2C_SR1;
356 regw_u32(I2C_CR1, 0x1, 8, SETBIT); //start
357 read_status = *I2C_SR1;
358 regw_u32(I2C_DR, 0xC1, 0, OWRITE); // segment address
359 read_status = *I2C_SR1;
360 read_status = *I2C_SR2;
361 regw_u32(I2C_DR, 0x7D, 0, OWRITE); // write a six
363 regw_u32(I2C_CR1, 0x1, 9, SETBIT); //stop
364 read_status = *I2C_SR1;
366 regw_u32(I2C_CR1, 0x1, 8, SETBIT); //start
367 read_status = *I2C_SR1;
369 regw_u32(I2C_DR, DISPLAY_ON, 0, OWRITE);
370 read_status = *I2C_SR1;
371 regw_u32(I2C_CR1, 0x1, 9, SETBIT); //stop */