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basic memory management and uart wait fix
[cortex-from-scratch]
/
link.ld
diff --git
a/link.ld
b/link.ld
index
d1a01dd
..
8301b2c
100644
(file)
--- a/
link.ld
+++ b/
link.ld
@@
-1,9
+1,9
@@
-/*
- * MEMORY MAP
+/*
*/
+MEMORY
{
FLASH (xr) : ORIGIN = 0x08000000, LENGTH = 512K
SRAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
-}
*/
+}
ENTRY(_start)
@@
-20,9
+20,9
@@
SECTIONS
.data :
{
*(.data)
- }
+ }
.bss : ALIGN(256)
{
*(.bss)
- }
+ }
}