/* SYSTEM CONTROL REGISTER */
#define SYSCTRL_RCC MEM_ADDR(0x40021000)
#define RCC_APB1ENR MEM_ADDR(0x4002101C) // register to enable I2C
+#define RCC_APB1RSTR MEM_ADDR(0x40021010) // register to reset I2C
#define RCC_APB2ENR MEM_ADDR(0x40021018) // register to enable USART1
#define SYSCTRL_RIS MEM_ADDR(0x400FE050)
#define GPIOA_CRH MEM_ADDR(0x40010804) // for USART1
#define GPIOA_ODR MEM_ADDR(0x4001080C)
#define GPIOB_CRL MEM_ADDR(0x40010C00) // low register (!) for I2C1
+#define GPIOB_BSRR MEM_ADDR(0x40010C10)
#define GPIOC_CRL MEM_ADDR(0x40011000) // led
#define GPIOC_CRH MEM_ADDR(0x40011004)
#define GPIOC_ODR MEM_ADDR(0x4001100C)
#define TIM4_EGR MEM_ADDR(0x40000814)
#define TIM4_SR1 MEM_ADDR(0x40000810)
#define TIM4_CCR1 MEM_ADDR(0x40000834)
+#define TIM4_CCR2 MEM_ADDR(0x40000838)
#define TIM4_PSC MEM_ADDR(0x40000828)
#define TIM4_SMCR MEM_ADDR(0x40000808)
#define TIM4_CCER MEM_ADDR(0x40000820)