basic scheduling, basic syscall, (added .data copy)

[cortex-from-scratch] / include / sys / mmap.h

diff --git a/include/sys/mmap.h b/include/sys/mmap.h
index 4ed901d..8a4baa9 100644 (file)
--- a/include/sys/mmap.h
+++ b/include/sys/mmap.h
@@ -31,23 +31,35 @@
 /* Safety macro's to get the address or value */
 #define MEM_VALUE(addr) *((volatile uint32_t(*) (addr))
 #define MEM_ADDR(addr) ((volatile uint32_t *) (addr))
+#define HW_ADDR(addr) (*((volatile unsigned long *)(addr)))
 
 /* SYSTEM INFO AND DEBUG */
 #define MCU_ID MEM_ADDR(0xE000ED00) 
 #define FLASH_MEM MEM_ADDR(0x1FFFF000)
 
+/* MEMORY PROTECTION UNIT */
+#define MPU_TYPER MEM_ADDR(0xE000ED90)
+#define MPU_CR MEM_ADDR(0xE000ED94)
+#define MPU_RNR MEM_ADDR(0xE000ED98)
+#define MPU_RBAR MEM_ADDR(0xE000ED9C)
+
 /* POWER CONTROL REGISTERS */
 #define PWR_CR MEM_ADDR(0x40007000)
 
 /* SYSTEM CONTROL BLOCK REGISTER */
 #define SCB_VTOR MEM_ADDR(0xE000ED08) // VECTOR TABLE
-#define SCB_VTOR_ST MEM_ADDR(0xE000ED04) // STATUS OF VECTOR
+#define SCB_ICSR MEM_ADDR(0xE000ED04) // STATUS OF VECTOR
 #define SCB_CCR MEM_ADDR(0xE000ED14) // SET SOFTWARE TRAPS
+#define SCB_SHCSR MEM_ADDR(0xE000ED24) // ENABLE VARIOUS FAULTS EXCEPTIONS
+#define SCB_CFSR MEM_ADDR(0xE000ED28) // GEN. USAGE FAULT STATUS REGISTER
+#define SCB_HFSR MEM_ADDR(0xE000ED2C) // HARD FAULT STATUS REGISTER
+#define SCB_BFAR MEM_ADDR(0xE000ED38) // BUS FAULT ADDRESS REGISTER
 
 /* NESTED VECTOR INTERRUPT CONTROL REGISTER */
 #define NVIC_ISER0 MEM_ADDR(0xE000E100) // interrupt set enable register
 #define NVIC_ISER1 MEM_ADDR(0xE000E104) // interrupt set enable register
 #define NVIC_ISER2 MEM_ADDR(0xE000E108) // interrupt set enable register
+#define NVIC_STIR MEM_ADDR(0xE000EF00) // Software trigger interrupt
 
 /* SYSTICK REGISTER */
 #define STK_CTRL MEM_ADDR(0xE000E010)