rtc implementation

[cortex-from-scratch] / drivers / uart.c

diff --git a/drivers/uart.c b/drivers/uart.c
index b370294..05f0406 100644 (file)
--- a/drivers/uart.c
+++ b/drivers/uart.c
@@ -10,7 +10,6 @@
 
 #include <drivers/uart.h>
 
-#define RXNE ((*USART1_SR >> 5) & 0x1)
 #define UARTBUF 256
 #define ECHO 1
 
@@ -24,16 +23,12 @@ void set_baudrate();
 
 void * uart_handler() {
 
-       //uart_puts("echo: ");
-       while (RXNE) {
+       while (rchkbit(USART1_SR, 5)) {
                char echochar = *USART1_DR;
-//             uart_putc(echochar);
                 linefeed.buf[linefeed.wpos++] = echochar;
                  if (linefeed.wpos == UARTBUF)
                          linefeed.wpos = 0;
-               //regw_u32(USART1_DR, echochar, 0, O_WRITE);
        }
-       //uart_putc('\n');
                
 }
 
@@ -43,45 +38,43 @@ void uart_init() {
        linefeed.wpos = 0;
 
        //memset(&linefeed, 0, (sizeof(struct linefeed) ));
-       regw_u32(RCC_APB2ENR, 0x4005, 0, SETBIT);// enable clock to UART1, AFIO and GPIOA
+       //regw_u32(RCC_APB2ENR, 0x4005, 0, SETBIT);// enable clock to UART1, AFIO and GPIOA
+       rsetbitsfrom(RCC_APB2ENR, 0, 0x4005);
        
        /* (after enable GPIOA), on PA9&PA10 and set mode
         *  to alternative output */
-       regw_u32(GPIOA_CRH, 0x444444D4, 0, OWRITE);
-       regw_u8(AFIO_EVCR, 0x89, 0, OWRITE);// set event control register, output on PA, Pin 9 TODO: check
+       //regw_u32(GPIOA_CRH, 0x444444D4, 0, OWRITE);
+       rwrite(GPIOA_CRH, 0x444444D4);
+       //regw_u8(AFIO_EVCR, 0x89, 0, OWRITE);// set event control register, output on PA, Pin 9 TODO: check
+       rsetbitsfrom(AFIO_EVCR, 0, 0x89);
 
        //disable temporarily to set values
-       regw_u8(USART1_CR1, 0x0, 13, SETBIT);
+       //regw_u8(USART1_CR1, 0x0, 13, SETBIT);
+       rclrbit(USART1_CR1, 13);
 
        set_baudrate();
 
-       regw_u32(USART1_CR2, 0x0000, 0, OWRITE); //set stop bit, default is 1 stop bit 0x00
+       //regw_u32(USART1_CR2, 0x0000, 0, OWRITE); //set stop bit, default is 1 stop bit 0x00
+       rwrite(USART1_CR2, 0x0000);
        
        /* parity = 8 bit, UART1 enabled,
         * TX and RX enabled, interrupts enabled */
-       //regw_u32(USART1_CR1, 0x000030AC, 0, O_WRITE);
-       regw_u32(USART1_CR1, 0x0000302C, 0, OWRITE);
+       //regw_u32(USART1_CR1, 0x0000302C, 0, OWRITE);
+       rwrite(USART1_CR1, 0x0000302C);
 
        ivt_set_gate(53, uart_handler, 0);
        
-       *NVIC_ISER1 = (1 << 5); // Enable UART interrupt at NVIC
-}
-
-static void wait() {
-       for (int i = 0; i < 400; i++);
+       rsetbit(NVIC_ISER1, 5);
 }
 
 void uart_putc(unsigned char ch) {
        
        if (ch == '\n') {
-               while (*USART1_SR & 0x0C) { } // transmit data register empty and complete
+               while(!rchkbit(USART1_SR, 6));
                regw_u8(USART1_DR, 0x0D, 0, OWRITE); // return line
        }
-
-       while (*USART1_SR & 0x0C) {} 
+               while(!rchkbit(USART1_SR, 6));
                regw_u8(USART1_DR, ch, 0, OWRITE);
-
-       wait();
 }
 
 char uart_getc(void) {