+
+ printf("SR1/CCR1: %p\n", ccr1);
+ printf("SR1/CCR2: %p\n", ccr2);
+ printf("SR2/CCR1: %p\n", ccr1b);
+ printf("SR2/CCR2: %p\n", ccr2b);
+
+ if (s1)
+ printf("EDGE DOWN\n");
+ if (s2)
+ printf("EDGE UP\n");
+
+ s1 = false;
+ s2 = false;
+}
+
+static void reset() {
+ rwrite(GPIOB_CRL, 0x44444444);
+}
+
+void * tmp_update_handler() {
+
+ printf("SR: %p\n", *TIM4_SR1);
+
+ rclrbit(TIM4_CR1, 0); /* EMULATOR STOP */
+ rclrbit(TIM4_SR1, 0);
+ rclrbit(TIM4_SR1, 1);
+ reset();
+ tsensor_input(0xFFFF);
+
+// if(rchkbit(TIM4_SR1, 1)) {
+// printf("TEST\n");
+// }
+
+}
+
+void * cnt_complete_handler() {
+ rclrbit(TIM4_CR1, 0);
+ rclrbit(TIM4_SR1, 0);
+ rclrbit(TIM4_DIER, 0);
+ rwrite(GPIOB_CRL, 0x44444444);
+ printf("CNT COMPLETE\n");
+ tsensor_input(0xFFFF);
+}
+
+
+void tsensor_simple(uint16_t preload) {
+
+ rsetbit(RCC_APB1ENR, 2); // TIM4 enable
+
+ rsetbitsfrom(TIM4_CR1, 5, 0x00); // edge-aligned mode
+ rclrbit(TIM4_CR1, 4); // upcounter (clrbit! not needed to set)
+ rsetbit(TIM4_CR1, 2); // only overflow generates update
+
+ rwrite(TIM4_PSC, PRESCALER - 1);
+ rwrite(TIM4_ARR, preload);
+ rsetbit(TIM4_EGR, 0);
+
+ ivt_set_gate(46, cnt_complete_handler, 0);
+ rsetbit(NVIC_ISER0, 30); // interupt 41 - 32
+
+ rsetbit(GPIOB_BSRR, 22); //
+ rsetbit(TIM4_DIER, 0);
+ rsetbit(TIM4_CR1, 0);
+
+}
+
+void run() {
+
+ rsetbit(RCC_APB2ENR, 3); // GPIOB enable
+ rwrite(GPIOB_CRL, 0x47444444); // open drain general
+
+ rsetbit(GPIOB_BSRR, 22); // high
+ tsensor_simple(2000);
+// tsensor_output(580, 520);
+// reset();
+// tsensor_simple(580);
+}