X-Git-Url: https://robinkrens.nl/gitweb/?a=blobdiff_plain;f=include%2Fmmap.h;h=aa8a90294c414c63be1f450734b18c200df51511;hb=6a0dad9f096144560b4b06da489ea8f88b0145ee;hp=ad450382023c4e9cc9add65c42859af5c238ab01;hpb=e0e42c2a52cb8371f4102832d20ffc5a52453a03;p=cortex-from-scratch

diff --git a/include/mmap.h b/include/mmap.h
index ad45038..aa8a902 100644
--- a/include/mmap.h
+++ b/include/mmap.h
@@ -4,34 +4,56 @@
  * a STM32F013RC6. Addresses of peripherals vary amongst 
  * manufacturers of boards with similar chips
  * 
- * Peace！
  * */
 
-/* VECTOR TABLE */
-#define NVIC_VECTTBL ((volatile unsigned long *)( 0xE000ED08))
-#define NVIC_EN0 ((volatile unsigned long *)( 0xE000E100))
-#define NVIC_EN1 ((volatile unsigned long *)( 0xE000E104))
+#define BSS_BASE ((volatile uint32_t *)(0x20000800)) //TODO: .data flexible siz
+#define TOTAL_MEM_SIZE 64000;
+
+/* SYSTEM INFO AND DEBUG */
+#define MCU_ID ((volatile uint32_t*)( 0xE000ED00)) 
+#define FLASH_MEM ((volatile uint32_t*)( 0x1FFFF000)) 
+
+/* SYSTEM CONTROL BLOCK REGISTER */
+#define SCB_VTOR ((volatile uint32_t *)( 0xE000ED08)) // VECTOR TABLE
+#define SCB_VTOR_ST ((volatile uint32_t *)( 0xE000ED04)) // STATUS OF VECTOR
+#define SCB_CCR ((volatile uint32_t *)( 0xE000ED14)) // SET SOFTWARE TRAPS
+
+/* NESTED VECTOR INTERRUPT CONTROL REGISTER */
+#define NVIC_ISER0 ((volatile uint32_t*)( 0xE000E100)) // interrupt set enable register
+#define NVIC_ISER1 ((volatile uint32_t*)( 0xE000E104)) // interrupt set enable register
+
+/* SYSTICK REGISTER */
+#define STK_CTRL ((volatile uint32_t *)(0xE000E010))
+#define STK_RELOAD ((volatile uint32_t *)(0xE000E014))
+
+/* CLOCK REGISTER */
+#define RCC_CR ((volatile uint32_t *)(0x40021000))
+#define RCC_CFGR ((volatile uint32_t *)(RCC_CR + 0x04))
+
+/* SYSTEM CONTROL REGISTER */
+#define SYSCTRL_RCC ((volatile unsigned long *)(0x40021000))
+#define RCC_APB2ENR ((volatile uint32_t *)(0x40021018)) // register to enable USART1
 
-/* SYSTEM CONTROL REGISTERS */
-#define SYSCTRL_RCC ((volatile unsigned long *)(0x400FE060))
 #define SYSCTRL_RIS ((volatile unsigned long *)(0x400FE050))
 #define SYSCTRL_RCGC1 ((volatile unsigned long *)(0x400FE104))
 #define SYSCTRL_RCGC2 ((volatile unsigned long *)(0x400FE108))
 #define GPIOPA_AFSEL ((volatile unsigned long *)(0x40004420))
 
-/* USART REGISTERS */
-#define UART0_DATA ((volatile unsigned long *)(0x4000C000))
-#define UART0_FLAG ((volatile unsigned long *)(0x4000C018))
-#define UART0_IBRD ((volatile unsigned long *)(0x4000C024))
-#define UART0_FBRD ((volatile unsigned long *)(0x4000C028))
-#define UART0_LCRH ((volatile unsigned long *)(0x4000C02C))
-#define UART0_CTRL ((volatile unsigned long *)(0x4000C030))
-#define UART0_RIS ((volatile unsigned long *)(0x4000C03C))
-
-#define UART1_DATA ((volatile unsigned long *)(0x4000D000))
-#define UART1_FLAG ((volatile unsigned long *)(0x4000D018))
-#define UART1_IBRD ((volatile unsigned long *)(0x4000D024))
-#define UART1_FBRD ((volatile unsigned long *)(0x4000D028))
-#define UART1_LCRH ((volatile unsigned long *)(0x4000D02C))
-#define UART1_CTRL ((volatile unsigned long *)(0x4000D030))
-#define UART1_RIS ((volatile unsigned long *)(0x4000D03C))
+#define GPIOA_CRH ((volatile unsigned long *)(0x40010804))
+
+#define AFIO_EVCR ((volatile uint32_t *)(0x40010000))
+//#define AFIO_EXTICR1 ((volatile uint32_t *)(AFIO_EVCR + 0x08))
+
+/* EXTERNAL INTERRUPTS */
+#define EXTI_IMR ((volatile uint32_t *)(0x40010400))
+#define EXTI_RTSR ((volatile uint32_t *)  (EXTI_IMR + 0x08))
+//#define EXTI_FTSR ((volatile uint32_t *)  (EXTI_IMR + 0x04))
+
+/* UART1 REGISTERS */
+#define USART1_BASE ((volatile uint32_t) (0x40013800))
+#define USART1_SR ((volatile uint32_t *) (USART1_BASE))
+#define USART1_DR ((volatile uint32_t *)  (USART1_BASE + 0x04))
+#define USART1_BRR ((volatile uint32_t *) (USART1_BASE + 0x08))
+#define USART1_CR1 ((volatile uint32_t *) (USART1_BASE + 0x0C))
+#define USART1_CR2 ((volatile uint32_t *) (USART1_BASE + 0x10))
+#define USART1_CR3 ((volatile uint32_t *) (USART1_BASE + 0x14))